MC9S12XD256MAL Datasheet, PDF (317/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
Register
Name
ICSYS R
W
Bit 7
SH37
6
SH26
5
SH15
4
SH04
3
2
1
TFMOD
PACMX
BUFEN
Bit 0
LATQ
Reserved R
W
Reserved
TIMTST R
W
Timer Test Register
PTPSR R
PTPS7
W
PTPS6
PTPS5
PTPS4
PTPS3
PTPS2
PTPS1
PTPS0
PTMCPSR R
PTMPS7
W
PTMPS6
PTMPS5
PTMPS4
PTMPS3
PTMPS2
PTMPS1 PTMPS0
PBCTL R
0
0
0
0
0
0
PBEN
PBOVI
W
PBFLG R
0
0
0
0
0
0
0
PBOVF
W
PA3H
R PA3H7
W
PA3H6
PA3H5
PA3H4
PA3H3
PA3H2
PA3H1
PA3H0
PA2H
R PA2H7
W
PA2H6
PA2H5
PA2H4
PA2H3
PA2H2
PA2H1
PA2H0
PA1H
R PA1H7
W
PA1H6
PA1H5
PA1H4
PA1H3
PA1H2
PA1H1
PA1H0
PA0H
R PA0H7
W
PA0H6
PA0H5
PA0H4
PA0H3
PA0H2
PA0H1
PA0H0
MCCNT R
(High)
MCCNT15 MCCNT14 MCCNT13 MCCNT12 MCCNT11 MCCNT10 MCCNT9 MCCNT8
W
MCCNT R
(Low)
MCCNT7
W
MCCNT6
MCCNT5
MCCNT4
MCCNT3
MCCNT2
MCCNT1 MCCNT9
TC0H (High) R TC15
TC14
TC13
TC12
TC11
TC10
TC9
TC8
W
TC0H (Low) R TC7
TC6
TC5
TC4
TC3
TC2
TC1
TC0
= Unimplemented or Reserved
Figure 7-2. ECT Register Summary (Sheet 4 of 5)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
317