MC9S12XD256MAL Datasheet, PDF (1321/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

0x00E0–0x00E7 Inter IC Bus (IIC0) Map (continued)
Address Name
Bit 7
R
0
0x00E5 Reserved
W
R
0
0x00E6 Reserved
W
R
0
0x00E7 Reserved
W
Bit 6
0
0
0
Bit 5
0
0
0
Bit 4
0
0
0
Bit 3
0
0
0
Appendix G Detailed Register Map
Bit 2
0
0
0
Bit 1
0
0
0
Bit 0
0
0
0
0x00E8–0x00EF Reserved
Address Name
Bit 7
R
0
0x00E8 Reserved
W
R
0
0x00E9 Reserved
W
R
0
0x00EA Reserved
W
R
0
0x00EB Reserved
W
R
0
0x00EC Reserved
W
R
0
0x00ED Reserved
W
R
0
0x00EE Reserved
W
R
0
0x00EF Reserved
W
Bit 6
0
0
0
0
0
0
0
0
Bit 5
0
0
0
0
0
0
0
0
Bit 4
0
0
0
0
0
0
0
0
Bit 3
0
0
0
0
0
0
0
0
Bit 2
0
0
0
0
0
0
0
0
Bit 1
0
0
0
0
0
0
0
0
Bit 0
0
0
0
0
0
0
0
0
0x00F0–0x00F7 Serial Peripheral Interface (SPI1) Map
Address Name
Bit 7
0x00F0
0x00F1
0x00F2
0x00F3
0x00F4
0x00F5
0x00F6
0x00F7
R
SPI1CR1
SPIE
W
R
0
SPI1CR2
W
R
0
SPI1BR
W
SPI1SR
R SPIF
W
R
0
Reserved
W
R
SPI1DR
Bit7
W
R
0
Reserved
W
R
0
Reserved
W
Bit 6
SPE
0
SPPR2
0
Bit 5
Bit 4
Bit 3
SPTIE
MSTR
CPOL
0
MODFEN BIDIROE
0
SPPR1 SPPR0
SPTEF MODF
0
0
0
0
0
6
5
4
3
0
0
0
0
0
0
0
0
Bit 2
CPHA
0
SPR2
0
0
2
0
0
Bit 1
SSOE
Bit 0
LSBFE
SPISWAI SPC0
SPR1
0
SPR0
0
0
0
1
Bit0
0
0
0
0
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
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