MC9S12XD256MAL Datasheet, PDF (1327/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Appendix G Detailed Register Map
0x0140–0x017F Freescale Scalable CAN — MSCAN (CAN0) Map (continued)
Address Name
0x0150– CAN0IDAR0– R
0x0153 CAN0IDAR3 W
0x0154– CAN0IDMR0– R
0x0157 CAN0IDMR3 W
0x0158– CAN0IDAR4– R
0x015B CAN0IDAR7 W
0x015C
–
0x015F
CAN0IDMR4– ^R
CAN0IDMR7 ^W
R
0x0160–
0x016F
CAN0RXFG
W
0x0170–
0x017F
CAN0TXFG
R
W
Bit 7
AC7
AM7
AC7
AM7
Bit 6
AC6
AM6
AC6
Bit 5
AC5
AM5
AC5
Bit 4
AC4
AM4
AC4
Bit 3
AC3
AM3
AC3
Bit 2
AC2
AM2
AC2
Bit 1
AC1
AM1
AC1
AM6
AM5
AM4
AM3
AM2
AM1
FOREGROUND RECEIVE BUFFER
(See Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
FOREGROUND TRANSMIT BUFFER
(See Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
Bit 0
AC0
AM0
AC0
AM0
Detailed MSCAN Foreground Receive and Transmit Buffer Layout
Address Name
Extended ID R
0xXXX0 Standard ID R
CANxRIDR0 W
Extended ID R
0xXXX1 Standard ID R
CANxRIDR1 W
Extended ID R
0xXXX2 Standard ID R
CANxRIDR2 W
Extended ID R
0xXXX3 Standard ID R
CANxRIDR3 W
0xXXX4
–
0xXXXB
CANxRDSR0–
CANxRDSR7
R
W
R
0xXXXC CANRxDLR
W
R
0xXXXD Reserved
W
R
0xXXXE CANxRTSRH
W
R
0xXXXF CANxRTSRL
W
Extended ID R
CANxTIDR0 W
0xXX10
Standard ID R
W
Bit 7
ID28
ID10
ID20
ID2
ID14
ID6
DB7
TSR15
TSR7
ID28
ID10
Bit 6
ID27
ID9
ID19
ID1
ID13
ID5
DB6
TSR14
TSR6
ID27
ID9
Bit 5
ID26
ID8
ID18
ID0
ID12
ID4
DB5
TSR13
TSR5
ID26
ID8
Bit 4
ID25
ID7
SRR=1
RTR
ID11
ID3
DB4
TSR12
TSR4
ID25
ID7
Bit 3
ID24
ID6
IDE=1
IDE=0
ID10
ID2
DB3
DLC3
TSR11
TSR3
ID24
ID6
Bit 2
ID23
ID5
ID17
ID9
ID1
DB2
DLC2
TSR10
TSR2
ID23
ID5
Bit 1
ID22
ID4
ID16
ID8
ID0
DB1
DLC1
TSR9
TSR1
ID22
ID4
Bit 0
ID21
ID3
ID15
ID7
RTR
DB0
DLC0
TSR8
TSR0
ID21
ID3
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
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