MC9S12XD256MAL Datasheet, PDF (343/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Field
0
LATQ
Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
Table 7-30. ICSYS Field Descriptions (continued)
Description
Input Control Latch or Queue Mode Enable — The BUFEN control bit should be set in order to enable the IC
and pulse accumulators holding registers. Otherwise LATQ latching modes are disabled.
Write one into ICLAT bit in MCCTL, when LATQ and BUFEN are set will produce latching of input capture and
pulse accumulators registers into their holding registers.
0 Queue mode of Input Capture is enabled. The main timer value is memorized in the IC register by a valid input
pin transition. With a new occurrence of a capture, the value of the IC register will be transferred to its holding
register and the IC register memorizes the new timer value.
1 Latch mode is enabled. Latching function occurs when modulus down-counter reaches zero or a zero is
written into the count register MCCNT (see Section 7.4.1.1.2, “Buffered IC Channels”). With a latching event
the contents of IC registers and 8-bit pulse accumulators are transferred to their holding registers. 8-bit pulse
accumulators are cleared.
7.3.2.25 Precision Timer Prescaler Select Register (PTPSR)
R
W
Reset
7
PTPS7
0
6
PTPS6
0
5
PTPS5
0
4
PTPS4
0
3
PTPS3
0
2
PTPS2
0
1
PTPS1
0
Read: Anytime
Figure 7-47. Precision Timer Prescaler Select Register (PTPSR)
Write: Anytime
All bits reset to zero.
Table 7-31. PTPSR Field Descriptions
0
PTPS0
0
Field
Description
7:0
PTPS[7:0]
Precision Timer Prescaler Select Bits — These eight bits specify the division rate of the main Timer prescaler.
These are effective only when the PRNT bit of TSCR1 is set to 1. Table 7-32 shows some selection examples in
this case.
The newly selected prescale factor will not take effect until the next synchronized edge where all prescale counter
stages equal zero.
PTPS7
0
0
0
0
0
0
0
Table 7-32. Precision Timer Prescaler Selection Examples when PRNT = 1
PTPS6
0
0
0
0
0
0
0
PTPS5
0
0
0
0
0
0
0
PTPS4
0
0
0
0
0
0
0
PTPS3
0
0
0
0
0
0
0
PTPS2
0
0
0
0
1
1
1
PTPS1
0
0
1
1
0
0
1
PTPS0
0
1
0
1
0
1
0
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
Prescale
Factor
1
2
3
4
5
6
7
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