MC9S12XD256MAL Datasheet, PDF (572/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 15 Background Debug Module (S12XBDMV2)
15.2 External Signal Description
A single-wire interface pin called the background debug interface (BKGD) pin is used to communicate
with the BDM system. During reset, this pin is a mode select input which selects between normal and
special modes of operation. After reset, this pin becomes the dedicated serial interface pin for the
background debug mode.
15.3 Memory Map and Register Definition
15.3.1 Module Memory Map
Table 15-1 shows the BDM memory map when BDM is active.
Table 15-1. BDM Memory Map
Global Address
0x7FFF00–0x7FFF0B
0x7FFF0C–0x7FFF0E
0x7FFF0F
0x7FFF10–0x7FFFFF
Module
BDM registers
BDM firmware ROM
Family ID (part of BDM firmware ROM)
BDM firmware ROM
Size
(Bytes)
12
3
1
240
MC9S12XDP512 Data Sheet, Rev. 2.21
572
Freescale Semiconductor