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MC9S12XD256MAL Datasheet, PDF (717/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network
Chapter 19 S12X Debug (S12XDBGV2) Module
19.4.3.4 Trigger On XGATE S/W Breakpoint Request
The XGATE S/W breakpoint request issues a forced breakpoint request to the CPU immediately
independent of DBG settings. If the debug module is armed triggers the state sequencer into the disarmed
state. Active tracing sessions are terminated immediately, thus if tracing has not yet begun using begin-
trigger, no trace information is stored. XGATE generated breakpoints are independent of the DBGBRK
bits. The XGSBPE bit in DBGC1 determines if the XGATE S/W breakpoint function is enabled. The BDM
bit in DBGC1 determines if the XGATE requested breakpoint causes the system to enter BDM mode or
initiate a software interrupt (SWI).
19.4.3.5 Immediate Trigger
At any time independent of comparator matches or external tag signals it is possible to initiate a tracing
session and/or breakpoint by writing to the TRIG bit in DBGC1. This triggers the state sequencer into the
final state and issues a forced breakpoint request to both CPU and XGATE.
19.4.3.6 Trigger Priorities
In case of simultaneous triggers, the priority is resolved according to Table 19-38. The lower priority
trigger is suppressed. It is thus possible to miss a lower priority trigger if it occurs simultaneously with a
trigger of a higher priority. The trigger priorities described in Table 19-38 dictate that in the case of
simultaneous matches, the match on the lower channel number ([0,1,2,3) has priority. The SC[3:0]
encoding ensures that a match leading to final state has priority over all other matches independent of
current state sequencer state. When configured for range modes a simultaneous match of comparators A
and C generates an active match0 while match2 is suppressed.
Table 19-38. Trigger Priorities
Priority
Highest
Lowest
Source
XGATE
TRIG
External TAGHI/TAGLO
Match0 (force or tag hit)
Match1 (force or tag hit)
Match2 (force or tag hit)
Match3 (force or tag hit)
Action
Immediate forced breakpoint......(Tracing terminated immediately).
Enter final state
Enter State0
Trigger to next state as defined by state control registers
Trigger to next state as defined by state control registers
Trigger to next state as defined by state control registers
Trigger to next state as defined by state control registers
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
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