MC9S12XD256MAL Datasheet, PDF (627/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 17 Memory Mapping Control (S12XMMCV2)
17.3.2.8 Program Page Index Register (PPAGE)
Address: 0x0030
R
W
Reset
7
PIX7
1
6
PIX6
5
PIX5
4
PIX4
3
PIX3
2
PIX2
1
1
1
1
1
Figure 17-15. Program Page Index Register (PPAGE)
1
PIX1
1
0
PIX0
0
Read: Anytime
Write: Anytime
The program page index register allows accessing up to 4 Mbyte of FLASH or ROM in the global memory
map by using the eight page index bits to page 16 Kbyte blocks into the program page window located in
the CPU local memory map from address $8000 to address $BFFF (see Figure 1-16). The CPU has a
special access to read and write this register during execution of CALL and RTC instructions.
CAUTION
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Global Address [22:0]
1 Bit21
Bit14 Bit13
Bit0
PPAGE Register [7:0]
Address [13:0]
Address: CPU Local Address
or BDM Local Address
Figure 17-16. PPAGE Address Mapping
NOTE
Writes to this register using the special access of the CALL and RTC
instructions will be complete before the end of the instruction execution.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
627