MC9S12XD256MAL Datasheet, PDF (763/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 20 S12X Debug (S12XDBGV3) Module
20.3.2.8.2 Debug Comparator Address High Register (DBGXAH)
Address: 0x0029
7
R
0
W
Reset
0
6
Bit 22
5
Bit 21
4
Bit 20
3
Bit 19
2
Bit 18
1
Bit 17
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 20-15. Debug Comparator Address High Register (DBGXAH)
Read: Anytime
Write: Anytime when S12XDBG not armed.
Table 20-29. DBGXAH Field Descriptions
0
Bit 16
0
Field
Description
6–0
Bit[22:16]
Comparator Address High Compare Bits — The Comparator address high compare bits control whether the
selected comparator will compare the address bus bits [22:16] to a logic one or logic zero. This register byte is
ignored for XGATE compares.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
20.3.2.8.3 Debug Comparator Address Mid Register (DBGXAM)
Address: 0x002A
R
W
Reset
7
Bit 15
0
6
Bit 14
0
5
Bit 13
0
4
Bit 12
0
3
Bit 11
0
2
Bit 10
0
1
Bit 9
0
0
Bit 8
0
Figure 20-16. Debug Comparator Address Mid Register (DBGXAM)
Read: Anytime
Write: Anytime when S12XDBG not armed.
Table 20-30. DBGXAM Field Descriptions
Field
7–0
Bit[15:8]
Description
Comparator Address Mid Compare Bits — The Comparator address mid compare bits control whether the
selected comparator will compare the address bus bits [15:8] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
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