MC9S12XD256MAL Datasheet, PDF (709/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 19 S12X Debug (S12XDBGV2) Module
19.3.1.11.2 Debug Comparator Address High Register (DBGXAH)
0x0029
R
W
Reset
7
6
5
4
3
2
1
0
Bit 22
21
20
19
18
17
0
0
0
0
0
0
0
Unimplemented or Reserved
Figure 19-15. Debug Comparator Address High Register (DBGXAH)
Read: Anytime
Write: Anytime when DBG not armed.
Table 19-29. DBGXAH Field Descriptions
0
Bit 16
0
Field
Description
6–0
Bits [22:16]
Comparator Address High Compare Bits — The comparator address high compare bits control whether the
selected comparator will compare the address bus bits [22:16] to a logic 1 or logic 0. This register byte is ignored
for XGATE compares.
0 Compare corresponding address bit to a logic 0
1 Compare corresponding address bit to a logic 1
19.3.1.11.3 Debug Comparator Address Mid Register (DBGXAM)
0x002A
7
6
5
4
3
2
R
Bit 15
14
13
12
11
10
W
Reset
0
0
0
0
0
0
1
0
9
Bit 8
0
0
Figure 19-16. Debug Comparator Address Mid Register (DBGXAM)
Read: Anytime
Write: Anytime when DBG not armed.
Table 19-30. DBGXAM Field Descriptions
Field
Description
7–0
Bits [15:8]
Comparator Address Mid Compare Bits — The comparator address mid compare bits control whether the
selected comparator will compare the address bus bits [15:8] to a logic 1 or logic 0.
0 Compare corresponding address bit to a logic 0
1 Compare corresponding address bit to a logic 1
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
711