MC9S12XD256MAL Datasheet, PDF (686/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 18 Memory Mapping Control (S12XMMCV3)
18.5.3 On-Chip ROM Control
The MCU offers two modes to support emulation. In the first mode (called generator) the emulator
provides the data instead of the internal FLASH and traces the CPU actions. In the other mode (called
observer) the internal FLASH provides the data and all internal actions are made visible to the emulator.
18.5.3.1 ROM Control in Single-Chip Modes
In single-chip modes the MCU has no external bus. All memory accesses and program fetches are internal
(see Figure 18-27).
MCU
No External Bus
Flash
Figure 18-27. ROM in Single Chip Modes
18.5.3.2 ROM Control in Emulation Single-Chip Mode
In emulation single-chip mode the external bus is connected to the emulator. If the EROMON bit is set,
the internal FLASH provides the data and the emulator can observe all internal CPU actions on the external
bus. If the EROMON bit is cleared, the emulator provides the data (generator) and traces the all CPU
actions (see Figure 18-28).
MCU
Emulator
Observer
Flash
MCU
EROMON = 1
Emulator
Generator
Flash
EROMON = 0
Figure 18-28. ROM in Emulation Single-Chip Mode
MC9S12XDP512 Data Sheet, Rev. 2.21
686
Freescale Semiconductor