MC9S12XD256MAL Datasheet, PDF (1017/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Table 24-44. PPSH Field Descriptions
Field
Description
7–0
PPSH[7:0]
Polarity Select Port H
0 Falling edge on the associated port H pin sets the associated flag bit in the PIFH register.
A pull-up device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
1 Rising edge on the associated port H pin sets the associated flag bit in the PIFH register.
A pull-down device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
24.0.5.48 Port H Interrupt Enable Register (PIEH)
R
W
Reset
7
PIEH7
0
6
PIEH6
5
PIEH5
4
PIEH4
3
PIEH3
2
PIEH2
0
0
0
0
0
Figure 24-50. Port H Interrupt Enable Register (PIEH)
1
PIEH1
0
0
PIEH0
0
Read: Anytime.
Write: Anytime.
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated
with Port H.
Table 24-45. PIEH Field Descriptions
Field
Description
7–0
PIEH[7:0]
Interrupt Enable Port H
0 Interrupt is disabled (interrupt flag masked).
1 Interrupt is enabled.
24.0.5.49 Port H Interrupt Flag Register (PIFH)
7
R
PIFH7
W
6
PIFH6
5
PIFH5
4
PIFH4
3
PIFH3
2
PIFH2
1
PIFH1
0
PIFH0
Reset
0
0
0
0
0
0
0
0
Figure 24-51. Port H Interrupt Flag Register (PIFH)
Read: Anytime.
Write: Anytime.
Each flag is set by an active edge on the associated input pin. This could be a rising or a falling
edge based on the state of the PPSH register. To clear this flag, write logic level “1” to the
corresponding bit in the PIFH register. Writing a “0” has no effect.