MC9S12XD256MAL Datasheet, PDF (277/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

SSEM
Set Semaphore
Chapter 6 XGATE (S12XGATEV2)
SSEM
Operation
Attempts to set a semaphore. The state of the semaphore will be stored in the Carry-Flag:
1 = Semaphore is locked by the RISC core
0 = Semaphore is locked by the S12X_CPU
In monadic address mode, bits RS[2:0] select the semaphore to be set.
CCR Effects
NZVC
——— ∆
N: Not affected.
Z: Not affected.
V: Not affected.
C: Set if semaphore is locked by the RISC core; cleared otherwise.
Code and CPU Cycles
Source Form
SSEM #IMM3
SSEM RS
Address
Mode
IMM3
MON
00000
00000
Machine Code
Cycles
IMM3 1 1 1 1 0 0 1 0 PA
RS 1 1 1 1 0 0 1 1 PA
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
277