MC9S12XD256MAL Datasheet, PDF (330/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
7.3.2.14 Timer Input Capture/Output Compare Registers 0–7
R
W
Reset
15
Bit 15
0
14
Bit 14
0
13
Bit 13
0
12
Bit 12
0
11
Bit 11
0
10
Bit 10
0
9
Bit 9
0
8
Bit 8
0
Figure 7-19. Timer Input Capture/Output Compare Register 0 High (TC0)
R
W
Reset
7
Bit 7
0
6
Bit 6
0
5
Bit 5
0
4
Bit 4
0
3
Bit 3
0
2
Bit 2
0
1
Bit 1
0
0
Bit 0
0
Figure 7-20. Timer Input Capture/Output Compare Register 0 Low (TC0)
R
W
Reset
15
Bit 15
0
14
Bit 14
0
13
Bit 13
0
12
Bit 12
0
11
Bit 11
0
10
Bit 10
0
9
Bit 9
0
8
Bit 8
0
Figure 7-21. Timer Input Capture/Output Compare Register 1 High (TC1)
R
W
Reset
7
Bit 7
0
6
Bit 6
0
5
Bit 5
0
4
Bit 4
0
3
Bit 3
0
2
Bit 2
0
1
Bit 1
0
0
Bit 0
0
Figure 7-22. Timer Input Capture/Output Compare Register 1 Low (TC1)
R
W
Reset
15
Bit 15
0
14
Bit 14
0
13
Bit 13
0
12
Bit 12
0
11
Bit 11
0
10
Bit 10
0
9
Bit 9
0
8
Bit 8
0
Figure 7-23. Timer Input Capture/Output Compare Register 2 High (TC2)
R
W
Reset
7
Bit 7
0
6
Bit 6
0
5
Bit 5
0
4
Bit 4
0
3
Bit 3
0
2
Bit 2
0
1
Bit 1
0
0
Bit 0
0
Figure 7-24. Timer Input Capture/Output Compare Register 2 Low (TC2)
R
W
Reset
15
Bit 15
0
14
Bit 14
0
13
Bit 13
0
12
Bit 12
0
11
Bit 11
0
10
Bit 10
0
9
Bit 9
0
8
Bit 8
0
Figure 7-25. Timer Input Capture/Output Compare Register 3 High (TC3)
MC9S12XDP512 Data Sheet, Rev. 2.21
330
Freescale Semiconductor