MC9S12XD256MAL Datasheet, PDF (1229/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 30
Security (S12X9SECV2)
30.1 Introduction
This specification describes the function of the security mechanism in the S12X chip family
(S12X9SECV2).
30.1.1 Features
The user must be reminded that part of the security must lie with the application code. An extreme example
would be application code that dumps the contents of the internal memory. This would defeat the purpose
of security. At the same time, the user may also wish to put a backdoor in the application program. An
example of this is the user downloads a security key through the SCI, which allows access to a
programming routine that updates parameters stored in another section of the Flash memory.
The security features of the S12X chip family (in secure mode) are:
• Protect the contents of non-volatile memories (Flash, EEPROM)
• Execution of NVM commands is restricted
• Disable access to internal memory via background debug module (BDM)
• Disable access to internal Flash/EEPROM in expanded modes
• Disable debugging features for CPU and XGATE
Table 30-1 gives an overview over availability of security relevant features in unsecure and secure modes.
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MC9S12XDP512 Data Sheet, Rev. 2.21
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