MC9S12XD256MAL Datasheet, PDF (274/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 6 XGATE (S12XGATEV2)
SBC
Subtract with Carry
SBC
Operation
RS1 - RS2 - C ⇒ RD
Subtracts the content of register RS2 and the value of the Carry bit from the content of register RS1 using
binary subtraction and stores the result in the destination register RD. Also the zero flag is carried forward
from the previous operation allowing 32 and more bit subtractions.
Example:
SUB
SBC
BCC
R6,R4,R2
R7,R5,R3
; R7:R6 = R5:R4 - R3:R2
; conditional branch on 32 bit subtraction
CCR Effects
NZVC
∆∆∆∆
N: Set if bit 15 of the result is set; cleared otherwise.
Z: Set if the result is $0000 and Z was set before this operation; cleared otherwise.
V: Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RS1[15] & RS2[15] & RD[15]_new | RS1[15] & RS2[15] & RD[15]_new
C: Set if there is a carry from bit 15 of the result; cleared otherwise.
RS1[15] & RS2[15] | RS1[15] & RD[15]_new | RS2[15] & RD[15]_new
Code and CPU Cycles
Source Form
SBC RD, RS1, RS2
Address
Mode
Machine Code
TRI
0 0 0 1 1 RD
RS1
RS2
Cycles
01
P
MC9S12XDP512 Data Sheet, Rev. 2.21
274
Freescale Semiconductor