MC9S12XD256MAL Datasheet, PDF (1038/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
25.1.4 Block Diagram
A block diagram of the EEPROM module is shown in Figure 25-1.
EETX2K
Command
Interrupt
Request
EEPROM
Interface
Command Pipeline
cmd2
addr2
data2
cmd1
addr1
data1
Registers
EEPROM
1K * 16 Bits
sector 0
sector 1
Oscillator
Clock
Protection
Clock
Divider _EECLK
sector 511
Figure 25-1. EETX2K Block Diagram
25.2 External Signal Description
The EEPROM module contains no signals that connect off-chip.
25.3 Memory Map and Register Definition
This section describes the memory map and registers for the EEPROM module.
25.3.1 Module Memory Map
The EEPROM memory map is shown in Figure 25-2. The HCS12X architecture places the EEPROM
memory addresses between global addresses 0x13_F800 and 0x13_FFFF. The EPROT register, described
in Section 25.3.2.5, “EEPROM Protection Register (EPROT)”, can be set to protect the upper region in the
EEPROM memory from accidental program or erase. The EEPROM addresses covered by this protectable
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MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor