MC9S12XD256MAL Datasheet, PDF (1026/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)
24.0.5.65 Port AD1 Pull Up Enable Register 1 (PER1AD1)
7
R
PER1AD17
W
6
PER1AD16
5
PER1AD15
4
PER1AD14
3
PER1AD13
2
PER1AD12
1
PER1AD11
0
PER1AD10
Reset
0
0
0
0
0
0
0
0
Figure 24-67. Port AD1 Pull Up Enable Register 1 (PER1AD1)
Read: Anytime.
Write: Anytime.
This register activates a pull-up device on the respective PAD[7:0] pin if the port is used as input. This bit
has no effect if the port is used as output. Out of reset no pull-up device is enabled.
Table 24-59. PER1AD1 Field Descriptions
Field
7–0
PER1AD1[7:0]
Pull Device Enable Port AD1 Register 1
0 Pull-up device is disabled.
1 Pull-up device is enabled.
Description
Functional Description
Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an
output from the external bus interface module or a peripheral module or an input to the external bus
interface module or a peripheral module.
A set of configuration registers is common to all ports with exceptions in the expanded bus interface and
ATD ports (Table 24-60). All registers can be written at any time; however a specific configuration might
not become active.
Example: Selecting a pull-up device
This device does not become active while the port is used as a push-pull output.
Table 24-60. Register Availability per Port¹
Port
Data
Data
Direction
Input
Reduced
Drive
Pull
Enable
Polarity Wired-OR Interrupt Interrupt
Select
Mode
Enable
Flag
A
yes
yes
—
yes
yes
—
—
—
—
B
yes
yes
—
—
—
—
—
E
yes
yes
—
—
—
—
—
K
yes
yes
—
—
—
—
—
T
yes
yes
yes
yes
yes
—
—
—
—
S
yes
yes
yes
yes
yes
yes
yes
—
—
M
yes
yes
yes
yes
yes
yes
yes
—
—
P
yes
yes
yes
yes
yes
yes
—
yes
yes
H
yes
yes
yes
yes
yes
yes
—
yes
yes
1028
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor