MC9S12XD256MAL Datasheet, PDF (332/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
R
W
Reset
15
Bit 15
0
14
Bit 14
0
13
Bit 13
0
12
Bit 12
0
11
Bit 11
0
10
Bit 10
0
9
Bit 9
0
8
Bit 8
0
Figure 7-33. Timer Input Capture/Output Compare Register 7 High (TC7)
R
W
Reset
7
Bit 7
0
6
Bit 6
0
5
Bit 5
0
4
Bit 4
0
3
Bit 3
0
2
Bit 2
0
1
Bit 1
0
0
Bit 0
0
Figure 7-34. Timer Input Capture/Output Compare Register 7 Low (TC7)
Read: Anytime
Write anytime for output compare function. Writes to these registers have no meaning or effect during
input capture.
All bits reset to zero.
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value of the
free-running counter when a defined transition is sensed by the corresponding input capture edge detector
or to trigger an output action for output compare.
7.3.2.15 16-Bit Pulse Accumulator A Control Register (PACTL)
7
R
0
W
6
5
4
3
2
1
0
PAEN
PAMOD
PEDGE
CLK1
CLK0
PAOVI
PAI
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-35. 16-Bit Pulse Accumulator Control Register (PACTL)
Read: Anytime
Write: Anytime
All bits reset to zero.
Table 7-18. PACTL Field Descriptions
Field
6
PAEN
Description
Pulse Accumulator A System Enable — PAEN is independent from TEN. With timer disabled, the pulse
accumulator can still function unless pulse accumulator is disabled.
0 16-Bit Pulse Accumulator A system disabled. 8-bit PAC3 and PAC2 can be enabled when their related enable
bits in ICPAR are set. Pulse Accumulator Input Edge Flag (PAIF) function is disabled.
1 16-Bit Pulse Accumulator A system enabled. The two 8-bit pulse accumulators PAC3 and PAC2 are cascaded
to form the PACA 16-bit pulse accumulator. When PACA in enabled, the PACN3 and PACN2 registers contents
are respectively the high and low byte of the PACA. PA3EN and PA2EN control bits in ICPAR have no effect.
Pulse Accumulator Input Edge Flag (PAIF) function is enabled. The PACA shares the input pin with IC7.
MC9S12XDP512 Data Sheet, Rev. 2.21
332
Freescale Semiconductor