MC9S12XD256MAL Datasheet, PDF (1004/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
as output in wired-OR (open drain) mode. This bit has no effect if the port is used as push-pull output. Out
of reset a pull-up device is enabled.
Table 24-25. PERS Field Descriptions
Field
Description
7–0
Pull Device Enable Port S
PERS[7:0] 0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
24.0.5.24 Port S Polarity Select Register (PPSS)
R
W
Reset
7
PPSS7
0
6
PPSS6
5
PPSS5
4
PPSS4
3
PPSS3
2
PPSS2
0
0
0
0
0
Figure 24-26. Port S Polarity Select Register (PPSS)
1
PPSS1
0
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
Table 24-26. PPSS Field Descriptions
0
PPSS0
0
Field
Description
7–0
PPSS[7:0]
Pull Select Port S
0 A pull-up device is connected to the associated port S pin, if enabled by the associated bit in register PERS
and if the port is used as input or as wired-OR output.
1 A pull-down device is connected to the associated port S pin, if enabled by the associated bit in register PERS
and if the port is used as input.
24.0.5.25 Port S Wired-OR Mode Register (WOMS)
R
W
Reset
7
WOMS7
0
Read: Anytime.
Write: Anytime.
6
WOMS6
5
WOMS5
4
WOMS4
3
WOMS3
2
WOMS2
1
WOMS1
0
0
0
0
0
0
Figure 24-27. Port S Wired-OR Mode Register (WOMS)
0
WOMS0
0
1006
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor