MC9S12XD256MAL Datasheet, PDF (252/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 6 XGATE (S12XGATEV2)
CPC
Compare with Carry
CPC
Operation
RS2 – RS1 - C ⇒ NONE (translates to SBC R0, RS1, RS2)
Subtracts the carry bit and the content of register RS2 from the content of register RS1 using binary
subtraction and discards the result.
CCR Effects
NZVC
∆∆∆∆
N: Set if bit 15 of the result is set; cleared otherwise.
Z: Set if the result is $0000; cleared otherwise.
V: Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RS1[15] & RS2[15] & result[15] | RS1[15] & RS2[15] & result[15]
C: Set if there is a carry from the bit 15 of the result; cleared otherwise.
RS1[15] & RS2[15] | RS1[15] & result[15] | RS2[15] & result[15]
Code and CPU Cycles
Source Form
CPC RS1, RS2
Address
Mode
TRI
Machine Code
0 0 0 1 1 0 0 0 RS1
Cycles
RS2 0 1
P
MC9S12XDP512 Data Sheet, Rev. 2.21
252
Freescale Semiconductor