English
Language : 

MC9S12XD256MAL Datasheet, PDF (543/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network
Chapter 13 Periodic Interrupt Timer (S12PIT24B4CV1)
13.3 Memory Map and Register Definition
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Register
Name
Bit 7
6
5
4
PITCFLMT R
0
PITE
PITSWAI PITFRZ
W
PITFLT
R
0
0
0
0
W
PITCE
R
0
0
0
0
W
PITMUX
R
0
0
0
0
W
PITINTE
R
0
0
0
0
W
PITTF
R
0
0
0
0
W
PITMTLD0
R
PMTLD7
W
PMTLD6
PMTLD5
PMTLD4
PITMTLD1
R
PMTLD7
W
PMTLD6
PMTLD5
PMTLD4
PITLD0 (High) R
PLD15
W
PLD14
PLD13
PLD12
PITLD0 (Low) R
W
PLD7
PLD6
PLD5
PLD4
PITCNT0 (High) R
PCNT15
W
PCNT14
PCNT13
PCNT12
PITCNT0 (Low) R
PCNT7
W
PCNT6
PCNT5
PCNT4
PITLD1 (High) R
PLD15
W
PLD14
PLD13
PLD12
= Unimplemented or Reserved
3
0
0
PFLT3
PCE3
PMUX3
PINTE3
PTF3
PMTLD3
PMTLD3
PLD11
PLD3
PCNT11
PCNT3
PLD11
2
0
0
PFLT2
PCE2
PMUX2
PINTE2
PTF2
PMTLD2
PMTLD2
PLD10
PLD2
PCNT10
PCNT2
PLD10
1
Bit 0
0
PFLMT1
0
PFLMT0
0
PFLT1
0
PFLT0
PCE1
PCE0
PMUX1 PMUX0
PINTE1 PINTE0
PTF1
PTF0
PMTLD1 PMTLD0
PMTLD1 PMTLD0
PLD9
PLD8
PLD1
PLD0
PCNT9 PCNT8
PCNT1 PCNT0
PLD9
PLD8
Figure 13-2. PIT Register Summary (Sheet 1 of 2)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
543