MC9S12XD256MAL Datasheet, PDF (201/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 6 XGATE (S12XGATEV2)
6.3.1.14 XGATE Register 6 (XGR6)
The XGR6 register (Figure 6-17) provides access to the RISC core’s register 6.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
XGR6
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 6-17. XGATE Register 6 (XGR6)
Read: In debug mode if unsecured
Write: In debug mode if unsecured
Table 6-14. XGR6 Field Descriptions
Field
Description
15–0
XGATE Register 6 — The RISC core’s register 6
XGR6[15:0]
6.3.1.15 XGATE Register 7 (XGR7)
The XGR7 register (Figure 6-18) provides access to the RISC core’s register 7.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
XGR7
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 6-18. XGATE Register 7 (XGR7)
Read: In debug mode if unsecured
Write: In debug mode if unsecured
Table 6-15. XGR7 Field Descriptions
Field
Description
15–0
XGATE Register 7 — The RISC core’s register 7
XGR7[15:0]
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
201