MC9S12XD256MAL Datasheet, PDF (960/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
23.0.5.73 Port AD1 Pull Up Enable Register 1 (PER1AD1)
7
6
5
4
3
2
1
R
PER1AD115 PER1AD114 PER1AD113 PER1AD112 PER1AD111 PER1AD110 PER1AD19
W
0
PER1AD18
Reset
0
0
0
0
0
0
0
0
Figure 23-75. Port AD1 Pull Up Enable Register 1 (PER1AD1)
Read: Anytime.
Write: Anytime.
This register activates a pull-up device on the respective PAD[15:8] pin if the port is used as input. This
bit has no effect if the port is used as output. Out of reset no pull-up device is enabled.
Table 23-66. PER1AD1 Field Descriptions
Field
7–0
Pull Device Enable Port AD1 Register 1
PER1AD1[15:8] 0 Pull-up device is disabled.
1 Pull-up device is enabled.
Description
Functional Description
Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an
output from the external bus interface module or a peripheral module or an input to the external bus
interface module or a peripheral module.
A set of configuration registers is common to all ports with exceptions in the expanded bus interface and
ATD ports (Table 23-67). All registers can be written at any time; however a specific configuration might
not become active.
Example: Selecting a pull-up device
This device does not become active while the port is used as a push-pull output.
Table 23-67. Register Availability per Port¹
Port
Data
Data
Direction
Input
Reduced
Drive
Pull
Enable
Polarity Wired-OR Interrupt Interrupt
Select
Mode
Enable
Flag
A
yes
yes
—
yes
yes
—
—
—
—
B
yes
yes
—
—
—
—
—
C
yes
yes
—
D
yes
yes
—
E
yes
yes
—
—
—
—
—
—
—
—
—
—
—
—
—
K
yes
yes
—
—
—
—
—
T
yes
yes
yes
yes
yes
—
—
—
—
S
yes
yes
yes
yes
yes
yes
yes
—
—
M
yes
yes
yes
yes
yes
yes
yes
—
—
MC9S12XDP512 Data Sheet, Rev. 2.21
962
Freescale Semiconductor