MC9S12XD256MAL Datasheet, PDF (1301/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

E.3
Appendix E Derivative Differences
MC9S12XD-Family Flash Configuration^{1 2 3 4 5}
Figure E-1. MC9S12XD Family Flash Configuration
Global Address
$78_0000 (PPAGE $E0)
DP512
A512
128k
$7A_0000 (PPAGE $E8)
128k
$7C_0000 (PPAGE $F0)
128k
$7E_0000 (PPAGE $F8)
128k
DT384
128k
128k
128k
DQ256
A/B256
DG128
A/B128
128k
128k
128k
Shared XGATE/CPU area
Not implemented
D64
64k
1. XGATE read access to Flash not possible on DG128/D128/A128/B128 and D64
2. Program Pages available on DT384 are $E0 - $E7 and $F0 - $FF
3. Program Pages available on B256/A256/DQ256/DT256/D256 are $E0 - $E7 and $F8 - $FF
4. Shared XGATE/CPU area on A512/DP512/DT512/DT384 at global address $78_0800 to $78_7FFF (30Kbyte)
5. Shared XGATE/CPU area on A256/B256/DT256/DQ256/D256 at global address $78_0800 to $78_7FFF (30Kbyte)
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
1303