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MC9S12XD256MAL Datasheet, PDF (54/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network
Chapter 1 Device Overview MC9S12XD-Family
Table 1-7. Signal Properties Summary (Sheet 3 of 4)
Pin
Name
Function 1
Pin
Name
Function 2
Pin
Name
Function 3
Pin
Name
Function 4
Pin
Name
Function 5
Power
Supply
Internal Pull
Resistor
CTRL
Reset
State
Description
PK2
PK1
PK0
PM7
PM6
PM5
PM4
PM3
PM2
PM1
PM0
PP7
PP6
PP5
PP4
PP3
PP2
PP1
PP0
PS7
PS6
ADDR18 IQSTAT2
—
ADDR17 IQSTAT1
—
ADDR16 IQSTAT0
—
TXCAN3 TXD3 TXCAN4
RXCAN3 RXD3 RXCAN4
TXCAN2 TXCAN0 TXCAN4
RXCAN2 RXCAN0 RXCAN4
TXCAN1 TXCAN0
—
RXCAN1 RXCAN0
—
TXCAN0
RXCAN0
KWP7
PWM7
—
—
SCK2
KWP6
KWP5
KWP4
KWP3
KWP2
KWP1
KWP0
SS0
SCK0
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
—
—
SS2
MOSI2
MISO2
SS1
SCK1
MOSI1
MISO1
—
—
—
—
—
—
—
SCK0
MOSI0
SS0
MISO0
—
—
—
—
—
—
—
—
—
—
—
—
VDDX
PUCR
Up Extended address, PIPE
status
VDDX
PUCR
Up Extended address, PIPE
status
VDDX
PUCR
Up Extended address, PIPE
status
VDDX
PERM/ Disabled Port M I/O, TX of CAN3 and
PPSM
CAN4, TXD of SCI3
VDDX PERM/PPSM Disabled Port M I/O RX of CAN3 and
CAN4, RXD of SCI3
VDDX PERM/PPSM Disabled Port M I/O CAN0, CAN2,
CAN4, SCK of SPI0
VDDX PERM/PPSM Disabled Port M I/O, CAN0, CAN2,
CAN4, MOSI of SPI0
VDDX PERM/PPSM Disabled Port M I/O TX of CAN1,
CAN0, SS of SPI0
VDDX PERM/PPSM Disabled Port M I/O, RX of CAN1,
CAN0, MISO of SPI0
VDDX
VDDX
VDDX
PERM/PPSM Disabled Port M I/O, TX of CAN0
PERM/PPSM Disabled Port M I/O, RX of CAN0
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
7
of PWM, SCK of SPI2
VDDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
6 of PWM, SS of SPI2
VDDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
5 of PWM, MOSI of SPI2
VDDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
4 of PWM, MISO2 of SPI2
VDDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
3 of PWM, SS of SPI1
VDDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
2 of PWM, SCK of SPI1
VDDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
1 of PWM, MOSI of SPI1
VDDX
PERP/
PPSP
Disabled Port P I/O, interrupt, channel
0 of PWM, MISO2 of SPI1
VDDX
PERS/
PPSS
Up Port S I/O, SS of SPI0
VDDX
PERS/
PPSS
Up Port S I/O, SCK of SPI0
MC9S12XDP512 Data Sheet, Rev. 2.21
54
Freescale Semiconductor