MC9S12XD256MAL Datasheet, PDF (1123/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
7
6
5
4
3
2
1
0
R
FDATALO
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 27-19. Flash Data Low Register (FDATALO)
All FDATAHI and FDATALO bits are readable but are not writable. At the completion of a data compress
operation, the resulting 16-bit signature is stored in the FDATA registers. The data compression signature
is readable in the FDATA registers until a new command write sequence is started.
27.3.2.11 RESERVED1
This register is reserved for factory testing and is not accessible.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 27-20. RESERVED1
All bits read 0 and are not writable.
27.3.2.12 RESERVED2
This register is reserved for factory testing and is not accessible.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 27-21. RESERVED2
All bits read 0 and are not writable.
27.3.2.13 RESERVED3
This register is reserved for factory testing and is not accessible.
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
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