MC9S12XD256MAL Datasheet, PDF (931/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

This register configures the drive strength of each port T output pin as either full or reduced. If the
port is used as input this bit is ignored.
Table 23-24. RDRT Field Descriptions
Field
Description
7–0
Reduced Drive Port T
RDRT[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
23.0.5.21 Port T Pull Device Enable Register (PERT)
7
R
PERT7
W
6
PERT6
5
PERT5
4
PERT4
3
PERT3
2
PERT2
1
PERT1
0
PERT0
Reset
0
0
0
0
0
0
0
0
Figure 23-23. Port T Pull Device Enable Register (PERT)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as
input. This bit has no effect if the port is used as output. Out of reset no pull device is enabled.
Table 23-25. PERT Field Descriptions
Field
Description
7–0
Pull Device Enable Port T
PERT[7:0] 0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
23.0.5.22 Port T Polarity Select Register (PPST)
R
W
Reset
7
PPST7
0
6
PPST6
5
PPST5
4
PPST4
3
PPST3
2
PPST2
0
0
0
0
0
Figure 23-24. Port T Polarity Select Register (PPST)
1
PPST1
0
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
0
PPST0
0