MC9S12XD256MAL Datasheet, PDF (461/1348 Pages) Freescale Semiconductor, Inc – Freescale’s Scalable Controller Area Network

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
• Four identifier acceptance filters, each to be applied to
— a) the 14 most significant bits of the extended identifier plus the SRR and IDE bits of CAN 2.0B
messages or
— b) the 11 bits of the standard identifier, the RTR and IDE bits of CAN 2.0A/B messages.
Figure 10-41 shows how the first 32-bit filter bank (CANIDAR0–CANIDA3,
CANIDMR0–3CANIDMR) produces filter 0 and 1 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 2 and 3 hits.
• Eight identifier acceptance filters, each to be applied to the first 8 bits of the identifier. This mode
implements eight independent filters for the first 8 bits of a CAN 2.0A/B compliant standard
identifier or a CAN 2.0B compliant extended identifier. Figure 10-42 shows how the first 32-bit
filter bank (CANIDAR0–CANIDAR3, CANIDMR0–CANIDMR3) produces filter 0 to 3 hits.
Similarly, the second filter bank (CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7)
produces filter 4 to 7 hits.
• Closed filter. No CAN message is copied into the foreground buffer RxFG, and the RXF flag is
never set.
CAN 2.0B
Extended Identifier _ID28
IDR0
ID21 ID20
IDR1
ID15 ID14
IDR2
CAN 2.0A/B
Standard Identifier
ID10
IDR0
ID3 ID2
IDR1 IDE
ID10
IDR2
ID7 ID6
IDR3
RTR
ID3 ID10
IDR3
ID3
AM7 CANIDMR0 AM0 AM7 CANIDMR1 AM0 AM7 CANIDMR2 AM0 AM7 CANIDMR3 AM0
AC7
CANIDAR0 AC0 AC7
CANIDAR1 AC0 AC7
CANIDAR2 AC0 AC7
CANIDAR3 AC0
ID Accepted (Filter 0 Hit)
Figure 10-40. 32-bit Maskable Identifier Acceptance Filter
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
461