HD64F2638F20J Datasheet, PDF (968/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 22B Clock Pulse Generator
(H8S/2639 Group, H8S/2635 Group)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Bits 1 and 0—Frequency Multiplication Factor (STC1, STC0): The STC bits specify the
frequency multiplication factor of the PLL circuit.
Bit 1
Bit 0
STC1
STC0
Description
0
0
×1
(Initial value)
1
×2
1
0
×4
1
Setting prohibited
Note: A system clock frequency multiplied by the multiplication factor (STC1 and STC0) should
not exceed the maximum operating frequency defined in section 24, Electrical
Characteristics.
22B.3 Oscillator
Clock pulses may be supplied either by connecting a crystal oscillator or inputting an external
clock. In the latter case, the input clock frequency should be between 4 MHz and 5 MHz.
22B.3.1 Connecting a Crystal Resonator
Circuit Configuration: A crystal resonator can be connected as shown in the example in figure
22B-2. Select the damping resistance R_d according to table 22B-2. An AT-cut parallel-resonance
crystal should be used.
C_L1
EXTAL
XTAL
R_d
C_L2
C_L1 = C_L2 = 10 to 22pF
Figure 22B-2 Connection of Crystal Resonator (Example)
Table 22B-2 Damping Resistance Value
Frequency (MHz)
4
5
Rd (Ω)
500
200
Page 918 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010