HD64F2638F20J Datasheet, PDF (150/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 4 Exception Handling
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
4.4 Interrupts
Interrupt exception handling can be requested by seven external sources (NMI, IRQ5 to IRQ0) and
49 internal sources in the on-chip supporting modules. Figure 4-4 classifies the interrupt sources
and the number of interrupts of each type.
The on-chip supporting modules that can request interrupts include the watchdog timer (WDT),
16-bit timer-pulse unit (TPU), serial communication interface (SCI), data transfer controller
(DTC), PC break controller (PBC), A/D converter, controller area network (HCAN), motor control
PWM timer, and I²C bus interface (IIC). Each interrupt source has a separate vector address.
NMI is the highest-priority interrupt. Interrupts are controlled by the interrupt controller. The
interrupt controller has two interrupt control modes and can assign interrupts other than NMI to
eight priority/mask levels to enable multiplexed interrupt control.
For details of interrupts, see section 5, Interrupt Controller.
Notes: The DTC, PBC, and IIC are not implemented in the H8S/2635 Group.
External
interrupts
NMI (1)
IRQ5 to IRQ0 (6)
Interrupts
Internal
interrupts
WDT^*1 (2)
TPU (26)
SCI (12)
DTC (1)
PBC (1)
A/D converter (1)
Motor control PWM (2)
HCAN (4)^*3
IIC^*2 (3) [Option]
Notes: Numbers in parentheses are the numbers of interrupt sources.
1. When the watchdog timer is used as an interval timer, it generates
an interrupt request at each counter overflow.
2. I²C bus interface is available as an option in the H8S/2638, H8S/2639, and H8S/2630.
3. 2 sources in the H8S/2635 Group.
Figure 4-4 Interrupt Sources and Number of Interrupts
Page 100 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010