HD64F2638F20J Datasheet, PDF (546/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 13 Serial Communication Interface (SCI)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Data Transfer Operations:
• SCI initialization (clocked synchronous mode)
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0,
then initialize the SCI as described below.
When the operating mode, transfer format, etc., is changed, the TE and RE bits must be cleared
to 0 before making the change using the following procedure. When the TE bit is cleared to 0,
the TDRE flag is set to 1 and TSR is initialized. Note that clearing the RE bit to 0 does not
change the contents of the RDRF, PER, FER, and ORER flags, or the contents of RDR.
Figure 13-15 shows a sample SCI initialization flowchart.
Start initialization
[1] Set the clock selection in SCR. Be sure
to clear bits RIE, TIE, TEIE, and MPIE,
TE and RE, to 0.
Clear TE and RE bits in SCR to 0
[2] Set the data transfer format in SMR
and SCMR.
Set CKE1 and CKE0 bits in SCR
(TE, RE bits 0)
[1] _{[3] Write a value corresponding to the bit}
rate to BRR. Not necessary if an
Set data transfer format in
SMR and SCMR
external clock is used.
[2]
[4] Wait at least one bit interval, then set
Set value in BRR
the TE bit or RE bit in SCR to 1.
[3]
Also set the RIE, TIE, TEIE, and MPIE
Wait
bits.
Setting the TE and RE bits enables the
No
TxD and RxD pins to be used.
1-bit interval elapsed?
Yes
Set TE and RE bits in SCR to 1, and
set RIE, TIE, TEIE, and MPIE bits [4]
<Transfer start>
Note: In simultaneous transmit and receive operations, the TE and RE bits should both be cleared
to 0 or set to 1 simultaneously.
Figure 13-15 Sample SCI Initialization Flowchart
Page 496 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010