HD64F2638F20J Datasheet, PDF (724/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 16 Controller Area Network (HCAN)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Table 16-5 HCAN Interrupt Sources
Channel IPR Bits
HCAN0 IPRM
(2 to 0)
HCAN1 IPRM
(6 to 4)
Vector
ERS0
OVR0
RM0
RM1
SLE0
ERS0
OVR0
RM0
RM1
SLE0
Vector
Number IRR Bit
108
IRR5
IRR6
108
IRR0
IRR2
IRR3
IRR4
IRR7
IRR9
IRR12
109
IRR1
108
IRR1
108
IRR8
106
IRR5
IRR6
106
IRR0
IRR2
IRR3
IRR4
IRR7
IRR9
IRR12
107
IRR1
106
IRR1
106
IRR8
Description
Error passive interrupt (TEC ≥ 128 or REC ≥
128)
Bus off interrupt (TEC ≥ 256)
Hardware reset processing interrupt
Remote frame reception interrupt
Error warning interrupt (TEC ≥ 96)
Error warning interrupt (REC ≥ 96)
Overload frame transmission interrupt
Unread message overwrite interrupt
HCAN sleep mode CAN bus operation
interrupt
Mailbox 0 message reception interrupt
Mailbox 1 to 15 message reception interrupt
Message transmission/cancellation interrupt
Error passive interrupt (TEC ≥ 128 or REC ≥
128)
Bus off interrupt (TEC ≥ 256)
Hardware reset processing interrupt
Remote frame reception interrupt
Error warning interrupt (TEC ≥ 96)
Error warning interrupt (REC ≥ 96)
Overload frame transmission interrupt
Unread message overwrite interrupt
HCAN sleep mode CAN bus operation
interrupt
Mailbox 0 message reception interrupt
Mailbox 1 to 15 message reception interrupt
Message transmission/cancellation interrupt
Page 674 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010