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HD64F2638F20J Datasheet, PDF (913/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 21C ROM
(H8S/2635 Group)
21C.7 Register Descriptions
21C.7.1 Flash Memory Control Register 1 (FLMCR1)
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode for on-chip flash memory is entered by setting SWE bit to 1 when FWE = 1,
then setting the PV or EV bit. Program mode for on-chip flash memory is entered by setting SWE
bit to 1 when FWE = 1, then setting the PSU bit, and finally setting the P bit. Erase mode for on-
chip flash memory is entered by setting SWE bit to 1 when FWE = 1, then setting the ESU bit, and
finally setting the E bit. FLMCR1 is initialized by a reset, and in hardware standby mode and
software standby mode. Its initial value is H'80 when a high level is input to the FWE pin, and
H'00 when a low level is input. When on-chip flash memory is disabled, a read will return H'00,
and writes are invalid.
Writes are enabled only in the following cases: Writes to bit SWE of FLMCR1 enabled when
FWE = 1, to bits ESU, PSU, EV, and PV when FWE = 1 and SWE = 1, to bit E when FWE = 1,
SWE = 1 and ESU = 1, and to bit P when FWE = 1, SWE = 1, and PSU = 1.
Bit: 7
6
5
4
3
2
1
0
FWE SWE ESU PSU
EV
PV
E
P
Initial value: —*
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
Note: * Determined by the state of the FWE pin.
Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory
programming/erasing.
Bit 7
FWE
0
1
Description
When a low level is input to the FWE pin (hardware-protected state)
When a high level is input to the FWE pin
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 863 of 1458