HD64F2638F20J Datasheet, PDF (273/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 9 I/O Ports
Section 9 I/O Ports
9.1 Overview
The chip has 10 I/O ports (ports 1, 3 and A to F, H, J), and two input-only port (ports 4 and 9).
Table 9-1 summarizes the port functions. The pins of each port also have other functions.
Each I/O port includes a data direction register (DDR) that controls input/output, a data register
(DR) that stores output data, and a port register (PORT) used to read the pin states. The input-only
ports do not have a DR or DDR register.
Ports A to E have an on-chip pull-up MOS function, and in addition to DR and DDR, have a MOS
input pull-up control register (PCR) to control the on/off state of MOS input pull-up.
Ports 3, and A to C include an open-drain control register (ODR) that controls the on/off state of
the output buffer PMOS.
When ports 10 to 13 and A to F are used as the output pins for expanded bus control signals, they
can drive one TTL load plus a 90pF capacitance load. Those ports in other cases and ports 14 to 17
and 3 can drive one TTL load and a 30pF capacitance load. All I/O ports can drive Darlington
transistors when set to output.
Port 1 pins (P16 and P14) and port 3 pins (P35 and P32) and port F (PF3 and PF0) are Schmitt-
trigger inputs.
See appendix C, I/O Port Block Diagrams, for a block diagram of each port.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 223 of 1458