HD64F2638F20J Datasheet, PDF (172/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 5 Interrupt Controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
(1) Interrupt Acceptance Control
In interrupt control mode 0, interrupt acceptance is controlled by the I bit in CCR.
Table 5-6 shows the interrupts selected in each interrupt control mode.
Table 5-6 Interrupts Selected in Each Interrupt Control Mode (1)
Interrupt Control Mode
0
2
Legend:
*: Don't care
Interrupt Mask Bits
I
0
1
*
Selected Interrupts
All interrupts
NMI interrupts
All interrupts
(2) 8-Level Control
In interrupt control mode 2, 8-level mask level determination is performed for the selected
interrupts in interrupt acceptance control according to the interrupt priority level (IPR).
The interrupt source selected is the interrupt with the highest priority level, and whose priority
level set in IPR is higher than the mask level.
Table 5-7 Interrupts Selected in Each Interrupt Control Mode (2)
Interrupt Control Mode
0
2
Selected Interrupts
All interrupts
Highest-priority-level (IPR) interrupt whose priority level is greater
than the mask level (IPR > I2 to I0).
Page 122 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010