HD64F2638F20J Datasheet, PDF (249/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 8 Data Transfer Controller (DTC)
8.2.9 Module Stop Control Register A (MSTPCRA)
Bit
Initial value
Read/Write
7
MSTPA7
0
R/W
6
MSTPA6
0
R/W
5
MSTPA5
1
R/W
4
MSTPA4
1
R/W
3
MSTPA3
1
R/W
2
MSTPA2
1
R/W
1
MSTPA1
1
R/W
0
MSTPA0
1
R/W
MSTPCRA is a 8-bit readable/writable register that performs module stop mode control.
When the MSTPA6 bit in MSTPCRA is set to 1, the DTC operation stops at the end of the bus
cycle and a transition is made to module stop mode. However, 1 cannot be written in the MSTPA6
bit while the DTC is operating. For details, see section 23A.5, 23B.5, Module Stop Mode.
MSTPCRA is initialized to H'3F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 6—Module Stop (MSTPA6): Specifies the DTC module stop mode.
Bit 6
MSTPA6
0
1
Description
DTC module stop mode cleared
DTC module stop mode set
(Initial value)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 199 of 1458