HD64F2638F20J Datasheet, PDF (895/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 21B ROM
(H8S/2638 Group, H8S/2639 Group, H8S/2630 Group)
Programming/
erasing
Wait time: x possible Wait time: 100 μs
φ
VCC
FWE
MD2 to MD0^*1
RES
SWE bit
tOSC1
t_MDS^*3
tMDS^*3
SWE set
Min. 0 μs
Min. 0 μs
SWE cleared
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)^*2
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations
prohibited)
Notes: 1. Except when switching modes, the level of the mode pins (MD2 to MD0) must be fixed until
power-off by pulling the pins up or down.
2. See section 24.2.7, 24.3.7, and 24.4.7, Flash Memory Characteristics.
3. Mode programming setup time tMDS (min.) = 200 ns
Figure 21B-18 Power-On/Off Timing (Boot Mode)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 845 of 1458