HD64F2638F20J Datasheet, PDF (372/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Bits 7 to 4— I/O Control B3 to B0 (IOB3 to IOB0)
I/O Control D3 to D0 (IOD3 to IOD0):
Bits IOB3 to IOB0 specify the function of TGRB.
Bits IOD3 to IOD0 specify the function of TGRD.
Bit 7 Bit 6 Bit 5 Bit 4
Channel IOB3 IOB2 IOB1 IOB0 Description
0
0
0
0
0
TGR0B Output disabled
(Initial value)
1
is output _{Initial output is 0 output at compare match}
1
0
compare _{0 output}
register
1 output at compare match
1
Toggle output at compare
match
1
0
0
Output disabled
1
10
Initial output is 1 0 output at compare match
output
1 output at compare match
1
Toggle output at compare
match
1
0
0
0
TGR0B Capture input Input capture at rising edge
1
is input source is
capture TIOCB0 pin
Input capture at falling edge
1
*
register
Input capture at both edges
1
*
*
Capture input Input capture at TCNT1
source is channel count-up/count-down^*1
1/count clock
*: Don’t care
Note: 1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000 and φ/1 is used as the TCNT1
count clock, this setting is invalid and input capture is not generated.
Page 322 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010