HD64F2638F20J Datasheet, PDF (236/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 7 Bus Controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
7.7 Write Data Buffer Function
The chip has a write data buffer function in the external data bus. Using this function enables the
write data buffer to be accessed in parallel. The write data buffer function is made available by
setting the WDBE bit in BCRL to 1.
Figure 7-18 shows an example of the timing when the write data buffer function is used. When
this function is used, if an external write continues for 2 states or longer, and there is an internal
access next, only an external write is executed in the first state, but from the next state onward an
internal access (on-chip memory or internal I/O register read/write) is executed in parallel with the
external write rather than waiting until it ends.
On-chip memory read Internal I/O register read
External write cycle
T₁
T₂
T_W
T_W
T₃
φ
Internal address bus
Internal read signal
Internal memory Internal I/O register address
A23 to A0
External
space
write
HWR, LWR
D15 to D0
External address
Figure 7-18 Example of Timing when Write Data Buffer Function Is Used
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REJ09B0103-0800 Rev. 8.00
May 28, 2010