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HD64F2638F20J Datasheet, PDF (143/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 4 Exception Handling
Section 4 Exception Handling
4.1 Overview
4.1.1 Exception Handling Types and Priority
As table 4-1 indicates, exception handling may be caused by a reset, trace, direct transition*, trap
instruction, or interrupt. Exception handling is prioritized as shown in table 4-1. If two or more
exceptions occur simultaneously, they are accepted and processed in order of priority. Trap
instruction exceptions are accepted at all times, in the program execution state.
Exception handling sources, the stack structure, and the operation of the CPU vary depending on
the interrupt control mode set by the INTM0 and INTM1 bits of SYSCR.
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
U-mask and W-mask versions, and H8S/2635 Group only. These functions cannot be used
with the other versions.
Table 4-1 Exception Types and Priority
Priority Exception Type
Start of Exception Handling
High
Reset
Trace*1
Direct transition*4
Starts immediately after a low-to-high transition at the RES
pin, or when the watchdog overflows. The CPU enters the
reset state when the RES pin is low.
Starts when execution of the current instruction or exception
handling ends, if the trace (T) bit is set to 1
Starts when a direct transition occurs due to execution of a
SLEEP instruction.
Interrupt
Starts when execution of the current instruction or exception
handling ends, if an interrupt request has been issued*2
Low
Trap instruction (TRAPA)*3 Started by execution of a trap instruction (TRAPA)
Notes: 1. Traces are enabled only in interrupt control mode 2. Trace exception handling is not
executed after execution of an RTE instruction.
2. Interrupt detection is not performed on completion of ANDC, ORC, XORC, or LDC
instruction execution, or on completion of reset exception handling.
3. Trap instruction exception handling requests are accepted at all times in program
execution state.
4. Subclock functions (subactive mode, subsleep mode, and watch mode) are available in
the U-mask and W-mask versions, and H8S/2635 Group only. These functions cannot
be used with the other versions.
Supported by the H8S/2635.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 93 of 1458