HD64F2638F20J Datasheet, PDF (439/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 10 16-Bit Timer Pulse Unit (TPU)
Contention between TCNT Write and Clear Operations: If the counter clear signal is
generated in the T₂ state of a TCNT write cycle, TCNT clearing takes precedence and the TCNT
write is not performed.
Figure 10-49 shows the timing in this case.
TCNT write cycle
T₁
T₂
φ
Address
TCNT address
Write signal
Counter clear
signal
TCNT
N
H'0000
Figure 10-49 Contention between TCNT Write and Clear Operations
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 389 of 1458