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HD64F2638F20J Datasheet, PDF (1007/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 23B Power-Down Modes [HD64F2636UF, HD6432636UF, HD64F2638UF, HD6432638UF,
HD64F2638WF, HD6432638WF, HD64F2639UF, HD6432639UF, HD64F2639WF, HD6432639WF,
HD64F2630UF, HD6432630UF, HD64F2630WF, HD6432630WF, HD6432635F, HD64F2635F, HD6432634F]
23B.2.3 Low-Power Control Register (LPWRCR)
Bit
:
7
6
5
4
3
2
1
0
DTON* LSON* NESEL* SUBSTP* RFCUT* ⎯
STC1 STC0
Initial value :
0
0
0
0
0
0
0
0
R/W
:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Note: * Bits 7 to 3 in LPWRCR are valid in the U-mask and W-mask versions, and H8S/2635
Group; they are reserved bits in all other versions.
See section 23A.2.3, Low-Power Control Register (LPWRCR), for more information.
The LPWRCR is an 8-bit read/write register that controls the low power dissipation modes.
The LPWRCR is initialized to H'00 at a reset and when in hardware standby mode. It is not
initialized in software standby mode. The following describes bits 7 to 2. For details of other bits,
see sections 22A.2.2, 22B.2.2, Low-Power Control Register (LPWRCR).
Bit 7—Direct Transition ON Flag (DTON): When shifting to low power dissipation mode by
executing the SLEEP instruction, this bit specifies whether or not to make a direct transition
between high-speed mode or medium-speed mode and the subactive modes. The selected
operating mode after executing the SLEEP instruction is determined by the combination of other
control bits.
Bit 7
DTON Description
0
• When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, software standby mode, or watch mode*.
• When the SLEEP instruction is executed in subactive mode, operation shifts
to subsleep mode or watch mode.
(Initial value)
1
• When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts directly to subactive mode*, or shifts to sleep mode or
software standby mode.
• When the SLEEP instruction is executed in subactive mode, operation shifts directly
to high-speed mode, or shifts to subsleep mode.
Note: * Always set high-speed mode when shifting to watch mode or subactive mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 957 of 1458