HD64F2638F20J Datasheet, PDF (1040/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 24 Electrical Characteristics
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Condition
Item
Symbol Min. Max. Unit Test Conditions
HCAN^* Transmit data delay time
tHTXD
—
100
ns
Figure 24-27
Receive data setup time
tHRXS
100
—
Receive data hold time
tHRXH
100
—
Note: * The HCAN input signal is asynchronous. However, its state is judged to have changed at
the leading edge (two clock cycles) of the CK clock signal shown in figure 24-27. The HCAN
output signal is also asynchronous. Its state changes based on the leading edge (two clock
cycles) of the CK clock signal shown in figure 24-27.
24.1.5 A/D Conversion Characteristics
Table 24-8 lists the A/D conversion characteristics.
Table 24-8 A/D Conversion Characteristics
Conditions: V_CC = 4.5 V to 5.5 V, PWMV_CC = 4.5 V to 5.5 V, AV_CC = 4.5 V to 5.5 V,
V_ref = 4.5 V to AV_CC, V_SS = PWMV_SS = PLLV_SS = AV_SS = 0 V,
T_a = –20°C to +75°C (regular specifications), T_a = –40°C to +85°C (wide-range
specifications)
Item
Resolution
Conversion time
Analog input capacitance
Permissible signal-source impedance
Nonlinearity error
Offset error
Full-scale error
Quantization
Absolute accuracy
Min.
10
10
—
—
—
—
—
—
—
Condition
Typ.
Max.
Unit
10
10
bits
—
—
µs
—
20
pF
—
5
kΩ
—
±3.5
LSB
—
±3.5
LSB
—
±3.5
LSB
±0.5
—
LSB
—
±4.0
LSB
Page 990 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010