HD64F2638F20J Datasheet, PDF (152/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 4 Exception Handling
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
4.6 Stack Status after Exception Handling
Figure 4-5 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP
CCR
CCR*
PC
(16 bits)
SP
EXR
Reserved*
CCR
CCR*
PC
(16 bits)
(a) Interrupt control mode 0
(b) Interrupt control mode 2
Note: * Ignored on return.
Figure 4-5 (1) Stack Status after Exception Handling
(Normal Modes: Not Available in the Chip)
SP
CCR
PC
(24 bits)
SP
EXR
Reserved*
CCR
PC
(24 bits)
(a) Interrupt control mode 0
(b) Interrupt control mode 2
Note: * Ignored on return.
Figure 4-5 (2) Stack Status after Exception Handling (Advanced Modes)
Page 102 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010