HD64F2638F20J Datasheet, PDF (153/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 4 Exception Handling
4.7 Notes on Use of the Stack
When accessing word data or longword data, the chip assumes that the lowest address bit is 0. The
stack should always be accessed by word transfer instruction or longword transfer instruction, and
the value of the stack pointer (SP, ER7) should always be kept even. Use the following
instructions to save registers:
PUSH.W Rn (or MOV.W Rn, @-SP)
PUSH.L ERn (or MOV.L ERn, @-SP)
Use the following instructions to restore registers:
POP.W
POP.L
Rn (or MOV.W @SP+, Rn)
ERn (or MOV.L @SP+, ERn)
Setting SP to an odd value may lead to a malfunction. Figure 4-6 shows an example of what
happens when the SP value is odd.
CCR
SP
R1L
H'FFFEFA
SP
H'FFFEFB
PC
PC
H'FFFEFC
H'FFFEFD
H'FFFEFE
SP
H'FFFEFF
TRAPA instruction executed MOV.B R1L, @−ER7
SP set to H'FFFEFF Data saved above SP Contents of CCR lost
Legend: CCR: Condition code register
PC: Program counter
R1L: General register R1L
SP: Stack pointer
Note: This diagram illustrates an example in which the interrupt control mode
is 0, in advanced mode.
Figure 4-6 Operation when SP Value Is Odd
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 103 of 1458