HD64F2638F20J Datasheet, PDF (259/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 8 Data Transfer Controller (DTC)
8.3.5 Normal Mode
In normal mode, one operation transfers one byte or one word of data.
From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a
CPU interrupt can be requested.
Table 8-5 lists the register information in normal mode and figure 8-6 shows memory mapping in
normal mode.
Table 8-5 Register Information in Normal Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register A
DTC transfer count register B
Abbreviation
SAR
DAR
CRA
CRB
Function
Designates source address
Designates destination address
Designates transfer count
Not used
SAR
Transfer
DAR
Figure 8-6 Memory Mapping in Normal Mode
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 209 of 1458