HD64F2638F20J Datasheet, PDF (450/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 11 Programmable Pulse Generator (PPG)
11.1.2 Block Diagram
Figure 11-1 shows a block diagram of the PPG.
Compare match signals
Control logic
NDERH
PMR
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
NDERL
PCR
PO15
PO14
PO13
PO12
PO11
PO10
PO9
PO8
Pulse output
pins, group 3
Pulse output
pins, group 2
Pulse output
pins, group 1
Pulse output
pins, group 0
PODRH
PODRL
NDRH
NDRL
Legend:
PMR: PPG output mode register
PCR: PPG output control register
NDERH: Next data enable register H
NDERL: Next data enable register L
NDRH: Next data register H
NDRL: Next data register L
PODRH: Output data register H
PODRL: Output data register L
Figure 11-1 Block Diagram of PPG
Internal
data bus
Page 400 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010