HD64F2638F20J Datasheet, PDF (1431/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Appendix B Internal I/O Register
TIER2—Timer Interrupt Enable Register 2
Bit
Initial value
Read/Write
7
TTGE
0
R/W
6
5
4
⎯ TCIEU TCIEV
1
0
0
⎯
R/W R/W
H'FF34
3
2
⎯
⎯
0
0
⎯
⎯
TPU2
1
TGIEB
0
R/W
0
TGIEA
0
R/W
TGR Interrupt Enable A
0 Interrupt requests (TGIA) by TGFA bit disabled
1 Interrupt requests (TGIA) by TGFA bit enabled
TGR Interrupt Enable B
0 Interrupt requests (TGIB) by TGFB bit disabled
1 Interrupt requests (TGIB) by TGFB bit enabled
Overflow Interrupt Enable
0 Interrupt requests (TCIV) by TCFV disabled
1 Interrupt requests (TCIV) by TCFV enabled
Underflow Interrupt Enable
0 Interrupt requests (TCIU) by TCFU disabled
1 Interrupt requests (TCIU) by TCFU enabled
A/D Conversion Start Request Enable
0 A/D conversion start request generation disabled
1 A/D conversion start request generation enabled
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 1381 of 1458