HD64F2638F20J Datasheet, PDF (326/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 9 I/O Ports
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
9.8.2 Register Configuration
Table 9-14 shows the port C register configuration.
Table 9-14 Port C Registers
Name
Abbreviation R/W
Port C data direction register
PCDDR
W
Port C data register
PCDR
R/W
Port C register
PORTC
R
Port C MOS pull-up control register PCPCR
R/W
Port C open-drain control register
PCODR
R/W
Note: * Lower 16 bits of the address.
Initial Value
H'00
H'00
Undefined
H'00
H'00
Address^*
H'FE3B
H'FF0B
H'FFBB
H'FF42
H'FE49
Port C Data Direction Register (PCDDR)
Bit
:
7
6
5
4
3
2
1
0
PC7DDR PC6DDR PC5DDR PC4DDR PC3DDR PC2DDR PC1DDR PC0DDR
Initial value :
0
0
0
0
0
0
0
0
R/W
:W
W
W
W
W
W
W
W
PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port C. PCDDR cannot be read; if it is, an undefined value will be read.
PCDDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode. The OPE bit in SBYCR is used to select whether the address output pins
retain their output state or become high-impedance when the mode is changed to software standby
mode.
• Modes 4 and 5
The corresponding port C pins are address outputs irrespective of the value of the PCDDR bits.
• Mode 6
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while
clearing the bit to 0 makes the pin an input port.
• Mode 7
Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing
the bit to 0 makes the pin an input port.
Page 276 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010