HD64F2638F20J Datasheet, PDF (701/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 16 Controller Area Network (HCAN)
16.3 Operation
The device is equipped with a 1-channel HCAN module or with 2-channel HCAN modules, which
are controlled independently. In the latter case, both modules have identical specifications, and
they are controlled in the same manner.
16.3.1 Hardware and Software Resets
The HCAN can be reset by a hardware reset or software reset.
Hardware Reset (HCAN Module Stop, Reset^*, Hardware^*/Software Standby): Initialization
is performed by automatic setting of the MCR reset request bit (MCR0) in MCR and the reset state
bit (GSR3) in GSR within the HCAN (hardware reset). At the same time, all internal registers are
initialized. However mailbox contents are retained. A flowchart of this reset is shown in figure
16-4.
Note: * In a reset and in hardware standby mode, the module stop bit is initialized to 1 and the
HCAN enters the module stop state.
Software Reset (Write to MCR0): In normal operation initialization is performed by setting the
MCR reset request bit (MCR0) in MCR (Software reset). With this kind of reset, if the CAN
controller is performing a communication operation (transmission or reception), the initialization
state is not entered until the message has been completed. During initialization, the reset state bit
(GSR3) in GSR is set. In this kind of initialization, the error counters (TEC and REC) are
initialized but other registers and RAM (mailboxes) are not. A flowchart of this reset is shown in
figure 16-5.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 651 of 1458